Success in basic verification of large-scale semiconductor integrated circuit technology that solves combinatorial optimization problems at low power consumption and at high speed.
This time, we have developed a scalable method for constructing a large-scale Ising LSI system that operates as one fully-connected system using the annealing method by connecting multiple fully-connected Ising LSI chips with a small number of inter-chip connections. Furthermore, we have demonstrated that this method works correctly using FPGA. This is the first time that scalability has been achieved in a fully coupled Ising LSI system using the annealing method.
The main technologies developed this time are as follows.
-We proposed a method to divide the energy calculation and update the spin. Using two types of chips, the energy is divided and calculated by the same plurality of chips of the first type, and the total is performed with one chip of the second type to obtain the value of the spin to be updated. The whole works as one fully coupled system. The advantage is that the amount of data communication between the first and second chips can be very small. Although the principle is simple, this enabled a scalable fully-connected LSI system for the first time as an annealing method.
-For the concept proof in the actual system, 16 FPGA chips (A-FPGA) as the first chip and 1 FPGA chip (C-FPGA) as the second chip were used to create a 384-spin fully coupled annealing processing system board. As a result, we confirmed that it is possible to operate with multiple chips with a small amount of communication while operating as one fully-coupled LSI system.
-We confirmed that the 92-node graph coloring problem and the 384-node maximum cut problem could be solved using this system. In the max-cut problem, the performance is 584 times faster and 46 times more energy efficient than computations that mimic fully coupled annealing operations on a PC with a CPU running at 4 GHz.
We will promote social implementation through joint research with companies and develop it into the core of semiconductor design technology for the revival of semiconductors in Japan.