4701 Patrick Henry Drive
Building 2
Santa Clara,  CA  95054

United States
  • Booth: 2724

Silvaco, Inc. is a leading provider of TCAD, circuit simulation, and IC CAD software tools. Silvaco’s tools are used by fabs for developing semiconductor processes, and design houses for developing analog, mixed-signal, and RF integrated circuits. The company provides a complete PDK-based design flow with interfaces to third-party design platforms. Silvaco has a worldwide presence with local offices in all key industrial regions in the world.

 Press Releases

  • Silvaco China New Direct Sales and Support Center in Shanghai


    SANTA CLARA, Calif.––May 24, 2016 Silvaco, Inc., a leading provider of electronic design automation software used for process and device development, and for analog/mixed-signal, power IC and memory design, has opened a new direct sales and support center located in Shanghai, China.  Located in the Pudong district, home of the Shanghai World Financial building and the Shanghai Stock Exchange, the office will provide a focal point for the company to support its rapidly growing customer base in China.

    Silvaco’s software tools for TCAD, SPICE simulation and full custom design are used by fabless companies for analog, mixed-signal, power IC and RF design, and by semiconductor fabs for accelerating process technology development.  The iPDK compatible full custom design tools includes schematic entry, layout, DRC/LVS, parasitic extraction. The capabilities also include reliability solutions for aging and thermal effects analysis at the device level, EM/IR at the circuit level, and radiation hardening capabilities for single event upset analysis.

    “As a world leader in TCAD-to-signoff solutions for design houses and fabs, especially in the flat panel display and power semiconductor markets, it is vital for us to work closely with our customers to understand their upcoming technology challenges and provide solutions,” said David L. Dutton, CEO of Silvaco.  “This expansion enables us to partner even closer with our customers in the expanding China market and is a key aspect of Silvaco’s global growth strategies.”

    “Silvaco China’s new Shanghai office enables us to provide a higher level of support for our products in the country,” said Sharon Fang, Silvaco China GM.  “Silvaco’s unique capabilities are ideally suited for IoT process nodes to provide affordable solution for the China market.  New products and capabilities for advanced process node design will also provide innovative solutions for China foundries rapid growth plans.”

    For Silvaco China’s detailed address and contact information, please visit



    Silvaco, Inc. is a leading EDA provider of software tools used for process and device development and for analog/mixed-signal, power IC and memory design. Silvaco delivers a full TCAD-to-signoff flow for vertical markets including: displays, power electronics, optical devices, radiation and soft error reliability and advanced CMOS process and IP development. For over 30 years, Silvaco has enabled its customers to bring superior products to market with reduced cost and in the shortest time. The company is headquartered in Santa Clara, California and has a global presence with offices located in North America, Europe, Japan and Asia.

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  • Technology Partnership Will Leverage High Performance Computing with Enhanced Models to Enrich Scalability, Accuracy and Speed of 3D TCAD Simulations

    Santa Clara, California - November 10, 2015 - Silvaco, Inc. today announced a partnership with the Institute for Microelectronics, TU Wien (Institut für Mikroelektronik der Technische Universität Wien/TU Wien) to establish the new Christian Doppler Laboratory (CDL) for High Performance TCAD (technology computer-aided design) in Vienna, Austria. The new CDL—officially opened on October 5th—provides a facility for application-oriented fundamental research conducted by leading university scientists and engineers from innovative companies such as Silvaco, which is jointly financing the project in conjunction with the Austrian Federal Ministry of Science, Research and Economics (BMWFW).

    “Developing microelectronic components cannot rely on trial and error, but instead engineers must obtain trends using simulation tools long before they actually fabricate real devices,” said Dr. Siegfried Selberherr, Professor at the Institute for Microelectronics, TU Wien. “The Institute for Microelectronics specializes in numerical simulations and specifically focuses on the development of software tools for the simulation of semiconductor devices. Our successful research strongly relies on intensive cooperation with national, European, and international industrial partners, and we are excited to work with Silvaco via the new CDL to develop tools that will be applied to the improvement of existing ultra-large-scale integration (ULSI) semiconductor devices and to support the development of new technologies.”

    “Parallel computing resources that can be used to handle extreme scales, high accuracy requirements and high aspect ratios are critical for today’s 3D TCAD applications,” said Dr. Josef Weinbub, the head of the new CDL. “Increasing manufacturing R&D costs are creating greater demand for more complex simulation, but simulation budgets are tight and customers want their simulation software to deliver results within a typical work day for optimal productivity. Our new research collaboration between TU Wien and Silvaco will leverage high-performance computing and parallelization of processors, as well as development of novel physical models to help significantly reduce simulation time while still maintaining accuracy.”

    “Dr. Selberherr and the team at TU Wien are renowned for their expertise in modeling and simulation of physical phenomena in the field of microelectronics, and Silvaco is pleased to work with them to develop complex yet cost-effective 3D process simulations to help customers maintain Moore’s Law,” said Silvaco Chief Executive Officer David L. Dutton. “Joining Silvaco’s already established Cambridge UK, and Grenoble, France sites, this new CDL will serve as the third research and development site in Europe for Silvaco.“


    About TU Wien Institute For Microelectronics

    The TU Wien Institute for Microelectronics' main research focus is the development of models, software algorithms and tools for the simulation of semiconductor devices and technological process steps. These tools are applied either to the improvement of existing ULSI semiconductor devices or to support the development of new technologies. As the Institute does not have any direct access to fabrication facilities, the successful research strongly relies on intensive co-operation with national, European, and international industrial partners. The Institute is also involved in Austrian and European research programs. The Institute's current research activities include:

    • Device Simulation
    • Process Simulation
    • High Performance Computing
    • Meshing
    • Very-Large-Scale Integration (VLSI)



    About Christian Doppler Research Association (CDG)

    The Christian Doppler Research Association (CDG) is considered a pioneer in Austria for successful collaborations between science and the private sector. For 25 years, CD Laboratories have opened the door for cooperation partners to perform application-oriented basic research of mutual benefit for companies and science. The Christian Doppler Research Association:

    • Funds application-oriented basic research
    • Gives companies effective access to new knowledge and operates as the interface between business and science



    About Silvaco, Inc.

    Silvaco, Inc. is a leading EDA provider of software tools used for process and device development and for analog/mixed-signal, power IC and memory design. Silvaco delivers a full TCAD-to-signoff flow for vertical markets including: displays, power electronics, optical devices, radiation and soft error reliability and advanced CMOS process and IP development. For over 30 years, Silvaco has enabled its customers to bring superior products to market at reduced cost and in the shortest time. The company is headquartered in Santa Clara, California and has a global presence with offices located in North America, Europe, Japan and Asia.

    Press/Media Contact:
    Institute for Microelectronics, TU Wien


  • Victory Process
    Victory Process is a general purpose 1D, 2D and layout-driven 3D process simulator for applications including: • Etching and Deposition • Implantation • Annealing • Stress simulation ...

  • Victory Process has two modes of operation:

    • The Advanced structure editor mode, or cell mode: for fast proto-typing of 3D structures
    • The Process simulator mode: full feature, level-set based process simulator, more suited to detailed process based simulation, such as complex physically-based etching, deposition, redeposition ion beam milling experiments and stress dependent oxidation analysis


    • Fast 3D structure prototyping capability enables the in-depth physical analysis of specific processing issues
    • Comprehensive set of diffusion models: Fermi, fullcpl, single-pair, and five-stream
    • Physical oxidation simulation with stress analysis
    • Extremely accurate and fast Monte Carlo implant simulation
    • Efficient multi-threading of time critical operations of Monte Carlo implantation, diffusion, oxidation and physical etching and deposition
    • Sophisticated multi-particle flux models for physical deposition and etching
      • with substrate material redeposition
      • with particle reflection
    • Open architecture allows easy introduction and modification of customer specific physical models
    • Seamless link to 3D device simulators including structure mirroring, adaptive doping refinement and electrode specification
    • Easy to learn, powerful debug mode and user friendly SUPREM-like syntax
    • Athena compatibility
    • Can also be used in 1D and 2D as a fast calibration platform
    • Automatic switching from 1D, 2D and 3D mode
    • Generation of parametrized layouts within the simulator input deck
    • Stress simulation, including external and intrinsic stress, lattice and thermal mismatch, doping and stressor layers
    • Physics based opto-lithographic simulator for realistic photo-resist mask shapes


    • Victory Process allows optimization of existing processes and provides predictive scaling behavior
    • Increase understanding of novel technology challenges
    • Reduce mask and prototyping foundry cost by replacing experiments by simulation
    • Reduce time to market for fabless by creation of virtual process based PDK prior to silicon


    Front-end-of-line (FEOL)

    • Advanced CMOS (FinFET, FDSOI), Display (TFT, LED, OLED), Power (Silicon, SiC, GaN), Optical (CIS, Solar cell, Laser)



  • Virtual Wafer Fab
    VWF enables users to perform advanced analysis tasks like design of experiments (DOE) or optimization, using any of the Silvaco simulators....

  • Introduction

    Silvaco’s Virtual Wafer Fab (VWF) software suite addresses this challenge through its use of statistical design of experiments (DoE), a powerful tool for quickly optimizing processes. The modern alternative to single-variable experimentation,  DOE overcomes the information limitations of successive approximation experiments and quickly provides the kind of understanding and results that are needed. Optimal designs reduce the cost of experimentation by allowing statistical models to be estimated with fewer experimental runs and facilitating reduced time to market.

    Silvaco’s Virtual Wafer Fab (VWF) software suite for automated simulations helps users to cut development costs dramatically and reduce silicon learning cycles and the risk of missing a market window.  As an alternative to DOE, the user can utilize an optimization framework consisting of several local and global optimization strategies to achieve a predefined target. This will allow users to automate tasks such as optimization of process parameters or calibration of model parameters. The VWF software is not limited to running only a single simulator but can combine any of the Silvaco simulation tools available allowing the user to optimize full-flow simulations. To support massive parallel operation, grid computing software like Oracle grid-engine (OGE) and LSF can be utilized. There is virtually no limit as to how many simulations can be carried out in parallel.



    • Graphical user interface (GUI)
    • Support for: SQL-92 based database engine, filemode to keep data in XML files, RSM plots of simulated data
    • Import/export features to copy data to/from the database
    • Massive parallel execution of simulations through Oracle Grid Engine and LSF supported
    • Results exportable into Excel or OpenOffice spreadsheet formats



    • VWF can represent an entire flow from process simulation to spice circuit performance, or just part of the flow
    • Powerful scripting interface allows users to customize DOEs, run experiments in the background, and compute complex optimization target functions
    • Process characteristics (i.e. oxide thickness), device characteristics (i.e. threshold voltage), and circuit characteristics (i.e. rise time) can be measured from entire flow
    • Each experimental variation can be run on a network of hosts to shorten simulation time
    • Response models can be generated over experimental spread and then input parameters can be rubber banded to see the effect on output responses
    • Full worksheet of input and measured output responses can be exported to SPAYN for additional statistical analysis or to TonyPlot for viewing purposes
    • Advanced security features allowing fine-grained access control



    VWF is shipped with many examples demonstrating how the user can best utilize a cluster of available computing hardware and how you can automate many types of applications, such as:

    • Parameterize important geometrical characteristics of a test structure, such as thicknesses of different layers, spacer width, gate length, etc., and investigate effects on important device characteristics
    • Allow optimization algorithm to vary process parameters, such as gate oxide time and temperature or Vt adjust implant dose and energy, to achieve targeted device characteristic, such as given threshold voltage
    • Start with a gds file of an inverter and simulate the 3D backend process to extract and analyze corresponding capacitances
    • Run fully automated calibrations of simulation model parameters – script allows user to combine several simulation runs into single target, enabling maximum flexibility

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