Mentor, A Siemens Business

8005 SW Boeckman Rd
Wilsonville,  OR  97070-9733

United States
http://www.mentor.com
  • Booth: 6661


Welcome to Mentor, A Siemens Business located at Booth 6661

Tessent ® product family, the most comprehensive silicon test and yield analysis software in the industry. With industry-leading technology such as cell-aware test, hybrid compression / logic BIST, hierarchical test, shared bus memory BIST, layout-aware diagnosis, and cell-aware diagnosis, Tessent offers the most capable solutions  for semiconductor test structure insertion, test pattern generation, silicon bring-up  and diagnosis for digital logic, embedded memories, mixed signal circuitry, and 3D ICs.

go.mentor.com/tessent


Xpedition HDAP Package design
, a comprehensive end-to-end solution, from rapid prototyping to GDS signoff, combines the Mentor® Xpedition, HyperLynx®, and Calibre® technologies. The new Mentor IC package design flow delivers faster, higher-quality results compared to existing methodologies and technologies. Mentor will be showcasing how this HDAP environment provides early, rapid and accurate “what-if” prototype evaluations in just hours enabling exploration and optimization of HDAP designs before detailed implementation.


www.mentor.com/pcb/ic-packaging


 Press Releases

  • Mentor OSAT Alliance Program Streamlines IC High-Density Advanced Packaging Design and Manufacturing
     

    Proven low-cost, low-risk path to designing HDAP technologies
    Trusted verification and signoff process for OSAT customers
    Increased OSAT business efficiency though proven Mentor flow
    Launches with Amkor as first OSAT alliance member


    Mentor, a Siemens business, today announced that it has launched the Mentor OSAT (outsourced assembly and test) Alliance program to help drive ecosystem capabilities in support of new high-density advanced packaging (HDAP) technologies like 2.5D IC, 3D IC and fan-out wafer-level packaging (FOWLP) for their IC designs. By launching this program, Mentor will work with OSATs to provide fabless companies with design kits, certified tools, and best practices to aid in smoother adoption of these new packaging solutions that require a much tighter link between chip and package design. Mentor also announced Amkor Technology, Inc. as its first OSAT Alliance member.

    Through the Mentor OSAT Alliance, members work with Mentor to create certified design kits to help customers speed up IC and advanced package development with Mentor’s Tanner® L-Edit AMS design cockpit, Calibre® IC physical verification platform, HyperLynx® SI/PI and HyperLynx full-wave 3D tools, Xpedition® Package Integrator and Xpedition Package Designer tools, and Mentor’s newly announced Xpedition HDAP flow.

    “Mentor’s customers are pioneering technologies at the heart of IoT, autonomous driving and next-generation wired and wireless networks,” said Joe Sawicki, vice president and general manager of the Design to Silicon Division at Mentor. “Many of these companies are designing ICs that use advanced packaging from OSATs to achieve their design goals. Like the Mentor Foundry Alliance program did for accelerating foundry design kit creation, the Mentor OSAT Alliance program will help our mutual customers use Mentor’s world-class EDA portfolio to more easily implement ICs with advanced packaging technologies.”

    Members of the Mentor OSAT Alliance will receive software, training and reference flow best practices from Mentor, in addition to the opportunity for co-marketing mutual offerings.

    “The next generation of IC packaging will require increased heterogeneous die integration, incorporating reduced size, weight, and improved performance and reliability,” said Ron Huemoeller, corporate vice president, research and development at Amkor. “Amkor’s Silicon Wafer Integrated Fan-out Technology (SWIFT™) package technology is designed to provide increased I/O and circuit density within a significantly reduced footprint and profile for single and multi-die applications. Being an integral part of the Mentor OSAT Alliance program will allow us to fast-track PDK development and delivery, and enable our customers to design more efficiently and predictably.”

    With alliance programs for both Foundries and OSAT’s, Mentor continues to enable the semiconductor ecosystem. The OSAT Alliance program will drive global design and supply chain adoption of these emerging advanced packaging technologies.

    Contact

    Mike Santarini

    Phone: 510-354-7322     E-mail: mike_santarini@mentor.com

    Mentor Graphics Corporation, a Siemens business, is a world leader in electronic hardware and software design solutions, providing products, consulting services, and award-winning support for the world’s most successful electronic, semiconductor, and systems companies. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. Web site: http://www.mentor.com.

    Mentor Graphics, Mentor, Tanner, Calibre, HyperLynx, Xpedition are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owner.

  • Mentor launches unique, end-to-end Xpedition High-Density Advanced Packaging flow

    The Mentor® Xpedition® High-Density Advanced Packaging (HDAP) flow is the industry’s first comprehensive solution for the design and verification of today’s leading-edge IC package designs.
    Industry-unique Xpedition Substrate Integrator tool enables rapid prototyping of heterogeneous substrate package assemblies.
     The new Xpedition Package Design technology for physical package implementation ensures data synchronization for confident design sign-off and verification.
    Integrated Mentor HyperLynx® technologies provide 2.5D/3D simulation models and design rule checking (DRC) to identify and resolve design errors with accuracy before tape-out.
    Calibre® 3DSTACK technology enables complete signoff verification of a wide variety of 2.5D and 3D stacked die assemblies.

    Mentor, a Siemens business, today announced the industry’s most comprehensive and productive solution for advanced IC package design, the Xpedition® High-Density Advanced Packaging (HDAP) flow. This comprehensive end-to-end solution, from rapid prototyping to GDS signoff, combines the Mentor® Xpedition, HyperLynx®, and Calibre® technologies. The new Mentor IC package design flow delivers faster, higher-quality results compared to existing HDAP methodologies and technologies. The Xpedition HDAP design environment provides early, rapid and accurate “what-if” prototype evaluations in just hours versus days or weeks compared to existing tools and processes, enabling exploration and optimization of HDAP designs before detailed implementation.

    With emerging advanced packaging technologies such as fan-out wafer-level packaging (FOWLP), the worlds of IC design and packaging design are converging. This presents unique challenges to existing traditional design methodologies, driving a demand for new efficient processes, methodologies and design tools. Existing tools are inefficient – often failing when designs get to manufacturing. Mentor has addressed this problem with a unique HDAP solution comprising multi-substrate integration prototyping, and detailed physical implementation with foundry/OSAT-level verification and signoff.

    “FOWLP projects a staggering expected growth rate of 82% from 2015 to 2020,” states Jan Vardaman, president of TechSearch International, Inc. “However, FOWLP is disruptive to the traditional design and manufacturing supply chain, and as with other high-density advanced packaging technologies, is driving the need for the co-design of devices and packages, and new flows, such as the Mentor HDAP solution.” 

    Unique HDAP Integration, Prototyping, and Package Design Technologies

    The new HDAP flow introduces two unique technologies. The first, the Xpedition Substrate Integrator tool, is a graphical, rapid virtual prototyping environment which explores and integrates heterogeneous ICs with interposers, packages and PCBs.  It provides fast and predictable assembly prototyping of complete cross-domain substrate systems through a rule-based methodology for optimal connectivity, performance, and manufacturability. The second new technology is the Xpedition Package Designer tool, a complete HDAP design-to-mask-ready GDS output solution, which manages the physical implementation of the package. The Xpedition Package Designer tool leverages the built-in HyperLynx design rule checking (DRC) for detailed in-design checking before signoff, and the HyperLynx FAST3D package solver provides package model creation. Direct integration with the Calibre tool then provides process design kit (PDK) signoff.

    Integrated HyperLynx® Technology for In-Design Checking

    The Xpedition HDAP flow is integrated with two Mentor HyperLynx technologies for 3D signal integrity (SI) and power integrity (PI), and in-process design rule checking (DRC). Package designers can simulate SI/PI 3D models using the HyperLynx FAST 3D field solver for extraction and analysis. The HyperLynx DRC tool easily identifies and resolves substrate-level DRC errors, typically finding 80-90% of the problems before final tape-out and sign-off verification.

    Calibre® 3DSTACK Technology

    When integrated with the Xpedition Package Designer tool, the Calibre 3DSTACK technology provides 2.5D/3D package physical verification. IC package designers can perform signoff design rule checking (DRC) and layout-versus-schematic (LVS) checking of complete multi-die systems at any process node, without breaking current tool flows or requiring new data formats, significantly reducing time to tapeout.

    OSAT Alliance Program

    Mentor has also launched an outsourced assembly and test (OSAT) Alliance program, a global design and supply chain resource for fabless customers to ease the adoption of emerging HDAP technologies. The OSAT Alliance Program includes proven design flows, tool kits, and recommended best practices for verification and signoff processes to create HDAP projects with the highest-quality results. Visit:  www.osat-alliance.com (confirm URL).

    “The new Xpedition HDAP solution from Mentor brings together proven, industry-leading technologies from Xpediton, HyperLynx, and Calibre,” stated A.J. Incorvaia, vice-president and general manager of the Mentor Board Systems Division. “Companies are looking for a proven focused solution for FOWLP that combines foundry and OSAT design and manufacturing signoff support. The Xpedition HDAP flow provides our customers with a unified design and verification environment for foundry sign-off-ready designs.”

    Product Availability

    The Xpedition HDAC solution is available today. For additional product information, go to the website: https://www.mentor.com/pcb/ic-packaging. Mentor will also conduct Xpedition HDAP flow technical sessions at the Design Automation Conference (June 19-22, 2017 in Austin, Texas). To register: https://www.mentor.com/events/design-automation-conference/focus/pcb

    Contact for journalists

    Larry Toda

    Phone: 503-685-1664; E-mail: larry_toda@mentor.com

    Mentor Graphics Corporation, a Siemens business, is a world leader in electronic hardware and software design solutions, providing products, consulting services, and award-winning support for the world’s most successful electronic, semiconductor, and systems companies. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. Web site: http://www.mentor.com.

    Mentor Graphics, Mentor, Xpedition, HyperLynx and Calibre are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owner.


 Products

  • Tessent Silicon Learning Solutions
    The Tessent® products increase productivity during critical silicon validation and yield ramp phases. The products provide solutions for test bring-up, silicon characterization, diagnosis-driven yield analysis, and failure analysis....

  • Tessent® Diagnosis solution turns failing test cycles into valuable data. Using layout-aware and cell-aware technology, it determines the defect’s most probable failure mechanism, logic location, and physical location. Tessent Diagnosis uses failure data from manufacturing test, Tessent FastScan or TestKompress patterns, and design information. This detailed analysis of devices that fail manufacturing test greatly reduces the failure analysis effort and creates the foundation for diagnosis-driven yield analysis.

    Tessent® SiliconInsight provides capabilities for performance characterization. The use of GPIB instruments allows measuring of an embedded component’s performance across any voltage and/or frequency range. This is very powerful in determining specific design areas that are the slowest and thus limit the overall performance of the design. The solution works in a bench-top environment and connects to any debug, performance, or bring-up board, accessing up to 120 device pins. BIST and IJTAG access is based on a IEEE 1149.1 standard TAP controller. Power supplies and clock generators are controlled through the IEEE 488 standard GPIB interface.  

    Tessent® YieldInsight®, is a specialized tool for understanding and identifying yield loss from scan test data and making volume diagnosis results actionable. Leveraging root cause deconvolution (RCD) technology, YieldInsight removes noise from diagnosis results and determines the underlying root causes. It uses innovative designcorrelated analysis methods that supplement traditional fab-centric yield management systems. In a manner consistent with yield and failure analysis
    tools, it steps through the process of selecting and filtering populations of failing die, grouping die that are failing for similar reasons, and analyzing various aspects of these populations to identify and locate systematic yield loss mechanisms


 Additional Info

New Exhibitor:
No
New Products:
Yes
Displaying Equipment:
Yes
Product Demonstrations:
Yes

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