Panasonic Industry Europe GmbH

  • Booth: A4474


Plasma Dicing, Dry Etching, Plasma Cleaning, Flip-chip

Plasma Dicing, Dry Etching, Plasma Cleaning, Flip-chip Bonding. 

Microelectronics

Sales office in Munich, Germany

For in-depth discussion and advice from Panasonic Smart Factory Solutions Europe on these topics, please visit our booth at SEMICON EUROPA Nov 13, 2018 – Nov 16, 2018


 Press Releases

  • Plasma Dicing Technology and Total Process

    Shinji Sasaguri*1, Masaru Nonomura*2, Atsushi Harikai*2

    *1: Panasonic Industry Europe GmbH, Panasonic Factory Solutions Europe

    Robert-Koch-Straße 100, 85521 Ottobrunn, Germany

    Shinji.Sasaguri@eu.panasonic.com

    *2: Panasonic Smart Factory Solutions Co., Ltd.

    2-7 Matsuba-ho, Kadoma, City, Osaka, 571-8502, Japan

    Abstract

    Recently many issues have arisen when using conventional dicing methods. Such conventional methods are mechanical sawing (blade dicing) or laser dicing. Relevant applications of these methods are thin wafers, brittle materials and wafer singulation for very small devices or LED or discrete devices. Plasma dicing is a recommended method to overcome the many challenges of wafer separation.

    Damage free, water free, particle free and high throughput dicing can be realized by using plasma trench etch (dry etch) technology for dicing. Several technical and equipment aspects will be presented and discussed in this paper..

    Plasma dicing technology can provide solutions for high rate dicing, high quality chip shape without any chipping and high chip strength.

    The throughput of a plasma chamber depends mainly on wafer thickness and is quite independent from wafer size or chip size. By using plasma for dicing, we can achieve more throughput than the blade dicing process. Such dicing cannot be achieved by any line-by-line dicing method as long as small chips are required. Significant cost savings can be expected.

    Typical topics on Plasma Dicing process are explained.

     
    1. Introduction

    Recently the plasma dicing process has become more attractive in the semiconductor market. As dies are becoming smaller and thinner, many products are facing the following difficulties in Fig1.

    • Increasing material loss due to the width of the dicing line,
    • Mechanical damage such as chipping,
    • Increasing processing time of mechanical dicing.

    The plasma dicing process can solve the above difficulties. Panasonic has developed a plasma dicing process and the necessary dicing equipment to achieve higher quality and throughput. [1][2][3][4][5]

    Panasonic demonstrate the potential of our new technology and total process with the plasma dicing process in this paper.

    1. Feature of plasma dicing process
    2. ​​Concept of plasma process

    The plasma dicing process uses a dicing street mask. The plasma process etches the streets by chemical reaction. All streets are etched in a single batch process. Fig2 shows the image of each process.

    Fig3 shows the key drivers or reasons to use plasma dicing. By using a chemical etching process, a chipping free and particle free process can be achieved and more chips can be designed into the wafer by using narrower dicing street width by using mask patterning. In addition, the mask pattern allows flexibility in chip shape.

    1. Particle-free and damage-free process

    The blade dicing process causes mechanical damage and affected layers by blade sawing. Fig4 demonstrates chipping at theedge and inner affected layer. On the other hand, the plasma dicing process doesn’t causeany damage. By the use of plasma, damage-free and particle-free etching is achieved.

    1. Higher chip strength

    Chip strength can be measured by chip breakage tests. Typical ranges of fracture strength for Si chips are in the range of 100 MPa up to 3000 MPa.

    Chips at several positions on a wafer are used for the measurement of chip strength. A Weibull plot is used to compare the statistical data for chip strength of different lots or chip preparation methods. [6][7]

    Panasonic verified the chip strength with a 150 mm thick wafer. Fig5 shows the compared results between blade and plasma dicing.

    The data show that the plasma dicing process achieves about 5 times higher strength than blade dicing samples.

    Under 600 MPa stress, all samples of blade dicing were broken. However, all samples of plasma dicing never broke. The plasma dicing process gives us drastically higher chip strength with thin wafers.

    1. Higher throughput and yield

    The processing time of blade dicing depends on the number of dicing lines. When smaller die size is demanded, longer dicing processing time is required. The throughput is reduced. However in the case of the plasma dicing process, throughput will not decrease, because etching is peformed overall on the whole wafer as shown in Fig6.

    In addition, the plasma dicing process can use a narrower dicing street design. With blade dicing, there is a limitation of minimum street width.

    Panasonic’soriginal simulation shows a higher yield of the number of dies. If the chip target is 0.5 mm square with a street width reducing from 60 mm to 20 mm, the yield will be increased by more than +15% compared against the blade dicing process.

    As shown in Fig7 and Fig8, the efficiency is very highfor small chip dicing.

    Fig9 and Fig10 show the result of small chip dicing with narrower dicing streets less than 5 µm. The plasma dicing process reduces the cost of production by increasing chip yield.

    1. Advantage of plasma dicing

    The plasma dicing process can solve the difficulties of current dicing processes and provides a high quality product with a low cost of production.

    Fig11 demonstrates the comparison of different dicing processes and the advantages of the plasma dicing process.

    1. Total solutions of plasma dicing process

    As shown in Fig12, the Panasonic plasma dicing process can be appliedto wafer dicing with either a photolithography mask or laser patterning mask. The appropriate process flow should be selected to fit the wafer design.

    1. Conclusions

    All of the data in this paper have been verified in the Plasma Dicing Demo Centre in Panasonic Smart Factory Solutions Osaka, Japan. Panasonic plasma dicer, APX300 was used for all these evaluations.

    In the near future, Panasonic will apply the plasma dicing process to other materials, not only Si but also SiC, GaAs and so on. Panasonic can provide aplasma dicing process to achieve damage-free, particle-free, higher throughput and low cost production.

    Reference

    1. K. Arita, etc, Proceedings of SEMICON JAPAN, SEMI Technology Symposium Session 9-P56-61 (2005).
    2. K. Arita,” Plasma Etching Technology for Wafer Thinning Process”,  KGD Workshop, California September (2006).
    3. K. Arita, “Plasma Etching technology for wafer thinning process –Plasma Stress Relief and Plasma Dicing process” , MAP2006 in Japan
    4. K. Arita, “Application of Plasma Dicing Technology for MEMS process”, SEMICON JAPAN, SEMI Technology Symposium (2008).
    5. N. Matsubara, Reinhard Windemuth, M. Hiroshima, A. Harikai, “Plasma dicing Technology”, ESTC2012.
    6. Reinhard Windemuth, “Plasma Dicing for Thin Wafers”, ESTC2015.
    7. S. Okita, “Improvement of the chip flexural strength by the Plasma Dicing technology”, 37th International Symposium on Dry Process, November (2015).


 Products

  • Panasonic Plasma Dicer and Dry Etcher APX300
    Panasonic Plasma Dicer and Dry Etcher. Model name: APX300. Plasma Dicer - 8" and 12" Wafer on Dicing Frame. Dry Etcher - Single Wafer up to 12" and Batch Wafers....

  • Panasonic Plasma Dicer and Dry Etcher
    Model name: APX300
    Plasma Dicer - 8" and 12" Wafer on Dicing Frame
    Dry Etcher - Single Wafer up to 12" and Batch Wafers

    The Panasonic APX300 Plasma Dicer is ideal for thin, brittle, and ultra-small die packages.
    Achieve ultra-narrow dicing streets at 20μm for thin wafers down to 50μm.
    And unlike blade dicing, plasma dicing will not induce edge chipping or surface layer stress damage related to mechanical heat.
     

    Capable of dicing very thin wafers without damage
    Conventional wafer dicing systems using blade dicing technology are disadvantageous in that chipping, cracks or the like are generated when handling very thin wafers or wafers with a low mechanical strength, causing low yields. APX300, on the other hand, makes it possible to dice silicon wafers without causing damage on them by employing plasma etching technology and using non-conventional machining processes. Plasma dicing is characterized in that no wafer is chipped, a reduced dicing width of approx. 1/3 of that with blade-dicing technology is achieved and a larger number of chips are produced depending on the size of chips. With plasma dicing technology, it is also possible to simultaneously divide a wafer along the dicing lines provided on the entire wafer surface, and therefore small sized chips can be obtained at high speed.
     

    Usable for various types of supported wafers
    APX300 can perform plasma dicing on wafers with protective tape for back grinding, wafers with a dicing frame, wafers with a glass supported substrate, etc.

  • Panasonic Flip-chip Bonder MD-P300
    Flip-chip Bonder MD-P300. High speed, high accuracy flip-chip bonder, up to 300 mm wafer....

  • Our newest process-flexible, flip-chip bonder combines flip chip, thermosonic, and thermocompression bonding in a single, small footprint solution.

    Flexible bonding tools change from thermosonic to C4 to TCB processes directly. It also supports 300mm (12") wafer substrates. The MD-P300 is an ideal solution for COB hybrid assembly with an in-line Panasonic SMT placement machine.

    Fast cycle times and placement accuracy of +/-5μm at 0.5 seconds per IC (dry run)—with thermosonic and C4 processes at 0.65 seconds, including process times.

  • Panasonic Plasma Cleaner PSX307
    Parallel plate chamber Plasma Cleaner - delivers superior etch uniformity over conventional batch systems....

  • The PSX307 plasma cleaner provides 1.5 times the productivity of conventional models. Parallel plate chamber technology delivers superior etch uniformity over conventional batch systems.

    Ultra-thin gold-plated electrodes can be wire bonded reliably without nickel compound formation via argon plasma treatment. Gold plating savings alone can provide ROI justification.

    Other capabilities include surface modification by oxygen plasma improving mold resin adhesion and under-fill wettability, and reducing incidence of peel-off, voids, and cracks.

    Panasonic plasma cleaning equipment sets the standard; thereby, refining tomorrow's technology today.


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