New-gen Automatic Test Equipment configurable for Si, SiC and GaN power products; high side and low side Driver ICs, IGBT, Power MOSFETs, Power ICs.

The VIP Ultra by Microtest is a next-generation, high-throughput ATE (Automatic Test Equipment) engineered for power-semiconductor testing—ideal for Si, SiC, GaN discrete devices, power modules, and high-/low-side driver ICs.
Designed for cleanroom integration, it delivers exceptional parallel performance metrics, scaling from 48 sites at 80 V and 250 A to 16 sites at 4 kV and 250 A, ensuring ultra-high throughput with minimal footprint and low total cost of ownership.
Its versatile configurations include DCS sources (±80 V, ±4 A across up to 48 channels), programmable DC load sinks/sources (±250 A on 48 channels), 320 digital lines (0–5.5 V, 50 mA with DSIO memory and per-channel PPMU), 48 time-measurement units, 48 LCR meters, 64 PPMUs, and Picoammeter accuracy down to 20 pA.
These resources enable a comprehensive suite of DC and energy-stress test capabilities.
Measuring 647 × 638 × 702 mm, VIP Ultra’s compact form fits seamlessly within existing probers and handlers. Launched at APEC 2025, it has been recognized as “Product of the Month” by Bodo’s Power Systems, solidifying its status as a leading solution for wide-bandgap semiconductor testing.
In summary, VIP Ultra combines unmatched scalability, compact design, and exhaustive test functionality across all power-device categories—offering manufacturers a superior tool for maximizing throughput, efficiency, and confidence in WBG technologies.

The DMT from Microtest is a compact, mixed‑signal and digital automatic test equipment (ATE) designed for efficient IC validation. Thanks to its ultra‑high hardware integration, it delivers more resources than larger testers while occupying the lowest footprint on the market.

A key feature is Kronos, an intelligent software toolset that automatically converts test descriptions into optimized test code, drastically cutting development time and accelerating time‑to‑market—new ICs can be validated in just a few weeks.
The system supports up to five slots with flexible configurations.
Each slot offers:
DC sources: low‑power (±110 V, ±200 mA), medium‑power (±110 V, ±4 A), and floating high‑power (±80 V, ±10 A)
Digital I/O: up to 256 channels per slot (−1.25 V to 6.75 V, 50 mA drive, active load ±12 mA), with 64 M pattern memory and 32 M DSIO
Time‑measurement unit & differential metering (up to 32 mux4) plus AWG & digitizer (up to 16 per slot).

Measuring just 230 mm × 350 mm × 500 mm, the DMT excels in lab or pre‑production environments where space is tight, resources must be dense, and testing must be fast and modular.

HATINA GP is a general-purpose ATE system developed by Microtest for high-parallelism testing of ASICs, PMICs, and Smart Power ICs/SoCs.
Designed for both wafer-level and packaged device applications, the system integrates modular resources for DC testing, digital signals, and complex measurements. Its intelligent resource management maximizes efficiency and reduces test costs.Thanks to built-in multiplexers, HATINA GP simplifies load board design, enhancing reliability and minimizing footprint. The architecture supports up to 10 configurable slots.
Per-slot resources include digital channels up to 800 MHz, high-current DPS, precision measurements with 20 pA resolution, and advanced instruments such as AWG, LCR meter, and digitizer.The system is compact, energy-efficient, and easily integrable into automated production environments.
Kronos software enables rapid, automated development of test programs, optimizing time-to-market.

HATINA GP is an ideal solution for production environments that demand flexibility, scalability, and high performance, particularly in the automotive, industrial, and smart power sectors.