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iSTART-TEK INC.

Hsinchu County,  Taiwan
https://www.istart-tek.com/en/
  • Booth: A1152

Overview

iSTART-TEK is a company that exclusively offers memory test and repair solutions, and provides customized design services. We hold innovative, unique and patented Configurable and Pipeline Architecture Based core technologies for memory test and accumulative memory repair, and provide real-time technical supports.

Through close collaboration, we provide total solutions to customers, enabling them to build optimized memory testing and repairing methods.
 

With the rapid progress of advanced semiconductor manufacturing processes, the design of new-generation electronic products has become increasingly sophisticated, and their functions have become more complicated.

The design of system chips has increased the demand for memories. As a result, chip design companies must actively seek better solutions when pursuing the ultimate goal of maintaining chip quality, power consumption, and performance to control product costs, and improve product reliability.

IC companies use the high-performance and low power consumption Configurable and Pipeline Architecture Based memory test solutions of iSTART-TEK to design and create system chips for new applications. With the help of these solutions, they can complete the design of high-quality chip in the shortest time and achieve effective cost control to strengthen their product competitiveness, maintaining a leading position in the competitive market of electronic systems.


  Press Releases

  • iSTART-TEK (TW: 6786) is Asia’s only company that specializes in memory testing and repair solutions, providing customized design services, EDA tools and IPs. As the automotive market heats up, global automakers are focusing on how to produce safer, more comfortable and convenient high-tech vehicles.

    iSTART-TEK’s loyalty contracts are mainly from automotive chip suppliers. The reason that STARTTM v3 and EZ-BIST have gained the favor of automotive electronic chip suppliers in the past is that their exclusive POT 1.0 function for automotive chip design fully met the design requirements of automotive chip developers.

    Recently, iSTART-TEK has introduced the exclusive “POT (Power_On Test) 2.0” function in STARTTM v3 and EZ-BIST for automotive chips. POT 2.0 not only helps developers to develop electronic components that are more cost-effective, better quality, and meet regulations, but its simple and user-friendly features also greatly satisfy many developers.

    POT 2.0 can be utilized in more cases, including recording the test process in ROM (Read-Only Memory) to control use cases, controlling use cases in the form of RTL or with a signal, and even controlling use cases through the CPU (Central Processing Unit).

    POT 2.0 also includes a new feature, “Real-Time Memory Monitoring” after power-on. This allows for immediate memory testing and repair of any errors found in the chip after power-on. The ” Real-Time Memory Monitoring” feature also conducts testing on the repaired memory to ensure it is functioning properly and maintaining normal operation. Another new feature in POT 2.0 is “Error Injection”, which is to ensure the accuracy of the memory test circuit, and supports iSTART-TEK’s patented “accumulated memory test and repair solution”. This allows for immediate memory testing and repair after power-on. When there are enough backup memories, it can proceed with repeated testing and repair of the chip’s memory along with the “Real-Time Memory Monitoring” feature, ensuring that the automotive electronic chip meets all safety regulations.

    iSTART-TEK stated that the features of POT 2.0 have strengthened the safety design of STARTTM v3 and EZ-BIST for automotive chips. It also enables iSTART-TEK to win more contracts from automotive chip suppliers.

  • Recently, there has been an increasing attention to EDA tools in the chip industry. In this regard, iSTART-TEK stated that EDA tools are the foundation of the IC industry. In the ever-changing global industries, to avoid bottlenecks in the IC design process, businesses and nations are more concerned about having independent and controllable EDA tools.

    The U. S. government has implemented strict export controls since August 15, 2022. Before that, the U. S. also launched the “CHIPS and Science Act 2022”, which was to cut off the supply of advanced process technologies, equipment, and materials to China. With government subsidies, the U. S. planned to attract the IC companies to return. Furthermore, the U. S. prohibited China from purchasing advanced process chips and chip manufacturing equipment on October 7, 2022.

    According to the analysis of iSTART-TEK, in the post-Moore era, chip design complexity has increased, and chips are becoming increasingly small, causing R&D and manufacturing costs to gradually rise. On the other hand, there are strong demands of AI, IoT, automotive electronics and large-scale computing-related applications, making the development cost of high-end chips made from advanced processes more expensive. That is why EDA tools are essential in shortening chip development cycle and reducing chip design costs.

    iSTART-TEK emphasizes that EDA (Electronic Design Automation) indicates the use of computer-aided design (CAD) software to complete the functional design, synthesis, verification, and physical design of IC chips, including layout, wiring, and layout designs. Therefore, EDA tools are widely applied in IC design, manufacturing and packaging.

    The fast-paced global IC industry provides a huge growth potential for the EDA tool market. In the recent years, the complexity of IC design and manufacturing processes has increased due to advances in IC manufacturing. This has led to a greater demand for EDA tools and the growth of the global EDA market. EDA tools have become crucial in IC design.

    As the leading provider of EDA tools and IPs, iSTART-TEK specializes in memory testing and repair technologies that are widely adopted by domestic and international IC design and service companies. The company’s unique and patented memory testing and repair technologies along with real-time technical support bring low-power-consumption, low-cost and high-efficiency solutions to the entire IC product lifecycle, from design to mass production.

    iSTART-TEK has had a long-standing involvement in the EDA field. With high-performance memory repair technologies and diverse memory testing algorithms, the company’s comprehensive memory testing and repair services have benefited IC design companies, design service companies and semiconductor foundries. By closely collaborating with the design and design service ends, iSTART-TEK’s solutions can help enhance the chip performance, stability and yield, and further accelerate time-to-market. In addition, the company’s total solutions have been successfully applied in the advanced processes ranging from 180nm to 7nm.

    Since its establishment, iSTART-TEK has constantly created values for customers with its philosophy of independent patents and technologies. iSTART-TEK ‘s high-performance memory repair technology and memory testing algorithms have been recognized by many well-known IC design companies in Taiwan, China and South Korea. Many of these companies have also signed contracts with iSTART-TEK that include royalty payments.

    iSTART-TEK said that its diverse algorithms, patented architectures and customized services are its core competitive edges that enable it to differentiate itself from the competitors. In terms of core technologies, iSTART-TEK has developed EDA tools including START™ v3, EZ-BIST, and EZ-NBIST specifically for IC design and design service companies. Through its deep technology accumulation, rich practical experience, and strong market foundation, the company has continually developed innovative products that greatly improve chip yield, lower chip development costs, and reduce memory repair time. All these contributions have boosted the development of the IC industries.

    START™ v3 (a memory testing and repair circuit development environment) contains two types of memory repair technologies, Hard Repair and Soft Repair. Hard Repair requires a non-volatile memory (NVM) as the component to record the memory error information. This feature can greatly shorten the memory repair time. Soft Repair does not require an NVM to record the memory error information. When there are enough backup memories, Soft Repair can repetitively perform the memory repair.

    Apart from a complete memory testing and repair circuit development environment, START™ v3 also provides numerous micro architectures, such as Bottom-Up Flow (BUF), Multi-Chain Power Consumption (MCP), Auto-Gating Clock Cell Insertion Flow (AGC), Power_On Test (POT), Dynamic Memory Test (DMT), Memory Group By Definition (MGD), Memory Protection Mechanism (MPM), Power Consumption Analysis Mechanism (PCA) and Error Correcting Code (PCA).

    For automotive chips, START™ v3 also provides a variety of memory testing and repair solutions. First, BISTBISRECC enables automotive chips to correct the memory errors during the system operation. Second, BISTBISRPOTRT can shorten the memory testing time when the chip is powered on and confirm the memory testing process simultaneously. Third, BISTBISRPOTUDA can execute customized memory testing algorithms to accurately detect the automotive chips with memory defects, so that the driving safety can be improved. Lastly, with BISTBISRPOTRepair, START™ v3 can perform large-scale memory repair when the range of memory defects in the automotive chip is too large, extending the automotive chips’ lifetime and improving driving safety.

    EZ-BIST (a memory testing circuit development environment) developed by iSTART-TEK is another EDA tool that is with a graphical user interface (GUI). It contains various memory testing algorithms. Through the GUI of EZ-BIST, IC design companies are able to select the most appropriate algorithms based on their chip development processes and chip applications, making the implementation of memory testing algorithm circuits more easily. In addition, the fool-proofing feature in EZ-BIST can prevent the errors caused by manual operation.

    EZ-NBIST (a configurable non-volatile memory testing and repair circuit development environment) is also an EDA tool based on GUI and provides customized testing and repair solutions for non-volatile memories (NVM). MVM is a type of memory that keeps the data stored in it when the power is turned off. Thus, it can be used as a data storage element. OTP, MTP, eFlash, and ReRAM are all NVMs.

    As said by iSTART-TEK, automotive chips must undergo precise memory testing before leaving the factory to ensure their reliability. IoT chips have stricter requirements of power consumption, cost and reliability. Currently most IoT chips require NVMs to reduce costs. EZ-NBIST can significantly reduce the NVM chip testing and repair time, simultaneously enhance the chip lifetime, and reduce the chip testing and repair costs.

    Facing the severe challenges brought about by the U.S. Chip Act, the only way to maintain dominance in the semiconductor industry is to be self-reliant. iSTART-TEK has technological independence and patented technologies, diversified algorithms, efficient memory repair techniques, and simplified circuit areas, helping customers improve chip quality and competitiveness.

    Enterprises had better consider using more professional, cost-effective EDA tools to develop high-quality, highly competitive chips, and iSTART-TEK’s specialized memory testing and repair technologies are the optimal solutions.

  • EDA tools are essential to streamline the IC design workflow and product development process, helping IC design companies stay competitive in a rapidly evolving industry. With the advancement of manufacturing processes, the complexity and cost of chip design have greatly increased, making EDA tools an indispensable technology.

    IC design companies require EDA tools to complete a series of tasks including feature designs, layouts, validation and simulation. As the advanced manufacturing processes and chip complexity increase, the cost of EDA tool software has also grown. However, if the companies adopt non-legally authorized EDA tools, they will not obtain real-time support and customized designs. Only by using legally authorized EDA tools can companies receive complete technical services.

    iSTART-TEK is a leading provider of EDA tools and IPs, offering innovative and patented memory testing and repair technologies. By working closely with our customers, we provide optimized memory test and repair solutions that meet their specific needs. Our core value lies in our innovative patented architecture, which enables us to create efficient memory testing and repair solutions. We also provide real-time technical support to quickly resolve customers’ memory testing and repair issues. Our competitive edge is from our diverse memory test algorithms and patented user-defined algorithm platform, which help to generate high-efficiency circuits with a reduced circuit area, significantly reduce DPPM, and improve yield rates.

    The COVID-19 pandemic has not only changed people’s lifestyles, but also their consumption habits. Online shopping and food delivery have become popular consumption ways, and people are more focused on the service experience in the post-epidemic era. Similarly, when it comes to EDA tools, legally authorized tools allow users to access professional and real-time support from suppliers. iSTART-TEK provides instant and professional technical support and customized designs to meet the specific needs of our customers. Our unique memory testing and repair solutions help them develop high-quality chips and increase competitiveness.


  Products

  • START
    START™ v3 (SoC’s Memory Testing and Repairing Technology) is a comprehensive memory testing and repairing solution for generating BIST and BISR circuits which can be inserted customers’ designs automatically....

  • START  v3 (SoC’s Memory Testing and Repairing Technology) is a comprehensive memory testing and repairing solution for generating BIST and BISR circuits which can be inserted customers’ designs automatically. Its user-friendly interface and menu-style constructive configuration make it easy for users to implement DFT in any IC design.

    Features

    • Supports standalone repairing technical for memories without redundancy
    • Supports UDM (User Defined Memory)
    • Supports memory grouping setting
    • Supports auto clock tracing
    • Supports gate-cell insertion for power saving
    • Supports POT (Power-On Testing)
    • Supports DMT (Dynamic Memory Testing)
    • Supports advanced testing algorithms for MRAM & ReRAM
    • Smart fool-proof design
    • No Memory instance limitation
    • GUI interface
    • Advanced repairing architecture
    • Multi-chain design
    • Bottom-up flow
    • Programmable algorithm
    • Multiple memory testing algorithms

    Application

    • Automotive
    • SSD
    • Security
    • AI
    • Edge Computing
    • Network
    • High Resolution TCON
    • AIoT

    Testing Interface

    • JTAG
    • IEEE 1149.7
    • IEEE 1687

  • EZ-BIST
    EZ-BIST is user-friendly with simple setup and easy operation, making it ideal for developing an MCU system with fewer than 50 memory instances....

  •  EZ-BIST is the best tool for academic and semiconductor research institutions to study MBIST behaviors and implementation. Its friendly interface and straightforward operation enable users to build BIST circuit instantly, effectively shortening SoC development time, improving product inspection and reducing development cost.

    Feature

    • Complete GUI interface
    • Supports UDM (User Defined Memory)
    • Supports memory grouping settings
    • Supports auto clock tracing
    • Supports clicks and drags to memory port insertion
    • Supports gate-cell insertion for power saving
    • Smart error proofing design
    • Memory BIST insertion up to 50 instances
    • Multiple memory testing algorithms
    • Supports testing algorithms selection by application & technology node

    Applications

    • MCU
    • IoT
    • Fingerprint recognition
    • Wireless

    Testing Interface

    • JTAG
  • NVM IP configurable testing and repairing platform
    The NVM configurable testing and repairing platform features multiple NVM IP models (EZ-NBIST), such as eFlash、OTP、MTP, etc. This platform can be utilized in applications that incorporate NVM IP....

  • NVM IP (EZ-NBIST)  accelerates the time required to complete the designs of testing and repair electric circuit.

    In addition, it provides customers with high efficiency testing and repair solutions, particularly for supporting advanced testing algorithms for ReRAM.

    Features

    • Multiple embedded NVM IP models (OTP, MTP, eFlash, MRAM, ReRAM)
    • Advanced testing algorithms for MRAM and ReRAM
    • Friendly GUI interface
    • Advanced testing and repairing architecture

    Application

    • Automotive
    • Security
    • White goods
    • MCU
    • IoT
    • Smartcards
    • Wearables
    • Gaming

    Testing Interface

    • JTAG
    • SPI
  • Memory Testing and Repairing IPs
    With accumulated patents and experiences in the testing field, iSTART can accomplish MBIST & MBISR according to customers’ requirements and offer corresponding IPs to customers instantly....

  • For all memory storages, such as e-Flash, MTP, SRAM, MRAM, etc., iSTART can customize IPs based on particular MBIST & MBISR design requirements. With accumulated patents and experiences in the testing field, iSTART can accomplish MBIST & MBISR according to customers’ requirements and offer corresponding IPs to customers instantly. By leveraging iSTART’s professional technology service, customers can significantly improve their product quality and yield rate.

    Features

    • Provides testing IPs for all kinds of memories
    • Supports POT (Power-On Testing)
    • Supports DMT (Dynamic Memory Test)
    • Customized IP testing design

    Applications

    • eFlash
    • OTP
    • MTP
    • Specific SRAM test and repair
    • MRAM
    • RRAM

    Testing Interface

    • JTAG
    • IEEE 1149.7
    • IEEE 1687
    • SPI
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