Elephantech Inc.

Chuo-Ku,  Tokyo 
Japan
https://www.elephantech.co.jp/
  • Booth: T9404

Copper Nanotechnology for AI Packaging

Overview

AI is pushing semiconductor packaging beyond the limits of conventional manufacturing. As AI accelerators, chiplets, and heterogeneous integration advance, the industry faces challenges in high-aspect-ratio vias, fine-line interconnects, glass-core substrates, process complexity, cost, and scalability.

Elephantech addresses these challenges with proprietary 15-nm-class Self-Assembling Copper Nanoparticle technology. Its portfolio includes Nano Copper Deposition, DeepVia™ for high-aspect-ratio via metallization, DS-SAP™ for advanced substrate wiring, and SAphire™ copper nanopaste for TGV filling and low-temperature copper sintering.

These technologies complement existing processes while reducing material use, simplifying manufacturing, improving reliability, and enabling higher-density packaging for AI and HPC.

This presentation introduces Elephantech’s latest solutions and explores collaboration with semiconductor manufacturers, substrate suppliers, and research partners.

  Products

  • DeepViaTM HDI
    Break the limits of conventional seed layers. Elephantech’s Nano Copper Deposition uses inkjet and copper nanoink to reinforce only the areas needed, enabling reliable high-aspect-ratio microvias, greater routing density, and precise via-depth control....

    • A novel solution of Elephantech’s proprietary Nano Copper Deposition technology platform, which combines inkjet technology and copper nanoink to realize selective formation or augmentation of seed layer only where needed.

    It enables reliable seed-layer formation for challenging high-aspect-ratio microvias beyond the coverage limits of conventional electroless plating approach to change designing rules and achieving significant routing efficiency. enabling easy and precise control of conductive via depth in advanced HDI boards.

  • Dual Seed-SAPTM
    Break the limits of SAP. Elephantech’s Nano Copper Deposition uses inkjet and copper nanoink to reinforce via seed layers only where needed. DS-SAP decouples surface and via requirements, delivering reliable via coverage with finer surface patterns....

    • A novel solution of Elephantech’s proprietary Nano Copper Deposition technology platform, which combines inkjet technology and copper nanoink to realize selective formation or augmentation of seed layer only where needed.

    It optimizes the SAP approach to decouple surface and via seed-layer requirements. Through combining conventional surface seed layer formation with selective via seed reinforcement, DS-SAP TM achieves both continuous via seed coverage and fine patterns on the surface

  • SAphireTM B
    Redefine PCB interconnection. SAphire™ B uses Self-Assembling Copper Nanoparticle technology to create low-resistance copper links for ultra-high-layer-count PCBs, enabling modular builds, better design freedom and thermal stability....

    • A member of Elephantech’s SAphire™ family of sintering copper nanopastes, which are built upon the company’s Self-Assembling Copper Nanoparticle technology. The series provides advanced material interface solutions spanning bonding, filling and interconnection applications.

    SAphireTM B delivers low-resistance copper interconnects to support modular manufacturing of ultra-high-layer-count PCBs, improving design freedom, scalability and thermal stability for demanding devices.

  • SAphireTM G
    Transform glass packaging. SAphire™ G uses Self-Assembling Copper Nanoparticle technology to fill high-aspect-ratio TGVs with low shrinkage, reducing voids, cracks and glass stress while improving reliability and manufacturing yield....

    • A member of Elephantech’s SAphire™ family of sintering copper nanopastes, which are built upon the company’s Self-Assembling Copper Nanoparticle technology. The series provides advanced material interface solutions spanning bonding, filling and interconnection applications.

    SAphireTM G achieves low-shrinkage filling in high-aspect-ratio TGV to minimize void and crack risks in the long-term, and reduce stress on glass during sintering, boosting reliability and manufacturing yield in glass-based advanced packaging.

Categories

200 Equipment, Assembly
  • Printing Equipment; Screen-printing; Alignment ; Film Printing
    • 205 Equipment, Nanotechnology
  • Equipment, Nanotechnology Tools
    • 300 Materials, Assembly
  • Printed Circuit Boards (PCB); Printed Wire Boards (PWB)
    • 301 Materials, Chemicals & Solids
  • Photo Resist; Developers & Ancillaries (incl. Adhesion promoter (HMDS); Primer; Anti-Reflective Coat
    • 305 Materials, Nanotechnology
  • Materials, Nanotechnology

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