July 12-14, 2016
San Fransisco, CA
Got protocol debugger? SmartDV does -- Smart ViPDebug!
SmartDV Technologies, the Proven and Trusted choice for Verification IP and verification services, will be in Booth #2226 with its extensive Verification IP portfolio compatible with all verification languages, platforms and methodologies. Stop by for a demo of Smart ViPDebug visual protocol debugger that rapidly identifies violations, reduces debug time and links waveform and transaction database views. To schedule a demo, go t: email@example.com
Also highlighted will be our Verification IP portfolio compatible with all verification languages, platforms and methodologies supporting all simulation, emulation and formal verification tools used in coverage-driven chip design verification flows. Or, ask about our extensive line of Design IP and SimXL portfolio of Synthesizable Transactors.