GenISys GmbH

Eschenstrasse 66
Taufkirchen,  Bavaria  82024

Germany
http://genisys-gmbh.com
  • Booth: 245


Welcome to GenISys!

Based in Munich, Germany, with subsidiaries in Yokohama, Japan, and San Francisco, California, GenISys develops markets and supports flexible, high-performance software solutions for the optimization of micro- and nano- fabrication processes. Addressing the market for lithography and inspection, GenISys combines deep technical expertise in layout data processing, process modeling, correction and optimization with world class software engineering and a strong focus on ease of use for applications in IC prototyping, mask production, DfM development and MEMS. For electron- and laser beam direct write and mask manufacturing, our data preparation and proximity effect correction software helps to push the limits of technology. Since its foundation in 2005, GenISys has become a global market leader in the field of electron-beam lithography software and is expanding to related markets and applications.

As a company focused on customer service, GenISys delivers fast, highly dedicated support for application and development of needed functionality to meet demanding customer needs.


 Products

  • LAB
    Lithography Simulation & OPC enables next generation products and faster development by computational design and process optimization...

  • Layout and process optimization platform for most common lithography technologies

    Experimental layout optimization and process development is highly time consuming and cost intensive. Lithography simulation allows access to numerous virtual experiment results in a short period of time and thereby significantly reducing development and production cost, and time to market by fast virtual exploration of a large parameter space. LAB enables further reduction in feature size for proximity, projection, laser and electron-beam lithography, for applications such as IC manufacturing, flat panel display, LED, MEMS, 3D packaging, mask manufacturing and nano-fabrication. The fast and accurate calculation of the intensity image allows layout optimization via Rule-OPC and Model-OPC, mask layout verification, optimization of process conditions (e.g. illumination, stack) and process window (e.g. gap or defocus and exposure dose variation) by varying the layout and/or exposure parameters. Thousands of experiments can be computed “overnight” without the need to produce masks or “burn” wafers. Once a good image contrast has been obtained, 3D resist development modeling allows further optimization of the resist profiles. Complex process effects such as lateral development, density dependent bias in electron-beam or in laser lithography can be analyzed and compensated.

  • BEAMER
    BEAMER is the most comprehensive lithography software for optimum electron and laser-beam exposure:...

  • Productivity, Quality & Innovation

    BEAMER provides reliable and highly powerful processing of large and complex layout data. It gives the user a large array of functions for extracting, combining and modifying the layout for an optimum exposure. Interfaces for all major electron and laser-beam exposure tools are developed in close cooperation with machine vendors and are continuously optimized for the best exposure results, thereby extending the limits of these systems by advanced data preparation. Examples include: optimized fracturing for a significant reduction in shot placement artifacts, automated floating field to avoid /reduce field placement and stitching issues, user controlled field placement, and enhanced multi pass
    strategies. The user can instantly visualize and quickly optimize the exposure process, including field and shot position. Applying techniques such as “bulk & sleeve” or “coarse & fine” combined with proximity effect correction (PEC) to easily and effectively achieve high resolution, smooth edges at increased throughput.

    • Support for all major electron- and laser-beam exposure systems
    • Superior machine specific fracturing of complex curved layouts
    • Optimized field and shot placement
    • Writing order control and advanced writing strategies
    • Library of comprehensive layout processing functions
    • Support for all major layout formats
    • Integrated layout editor
    • Built-in Viewer for immediate inspection, verification, and measurement of patterns
    • Powerful proximity and process effect correction technology
    • Electron-beam simulation of absorbed energy and resist contours
  • Masker
    Optimal mask productivity and quality for photonics, display, IoT and special devices - Masker is the Solution for Mask-Data-Preparation Mask-Process-Correction....

  • MASKER is a data preparation software package optimized for highest productivity and quality especially for masks in the application areas of photonics, displays, IoT and special devices. It extends todays technologies with many evolutionary developments that were adapted to these special applications over many years.

    Fracturing is optimized especially for non-Manhattan/curved layouts resulting in minimal shape count that leads to highest throughput and improved quality.

    Data volume is minimized for masks with highly repetitive structures, such as flat panel displays, by the utilization of a superior hierarchy engine. Optimal hierarchy enables efficient correction on cell level.

    Resolution, CD uniformity & linearity for laser and e-beam mask writer systems is improved through a comprehensive Rule and Model Based MPC to correct for tool and process effects.

    • Support for all major layout formats
    • Support for major e-beam and laser mask exposure systems
    • Superior fracturing of complex curved layouts
    • Library of comprehensive layout processing functions optimized for hierarchical processing
    • Integrated layout editor
    • Built-in VIEWER for immediate inspection, verification, and measurement of patterns
    • Rule Mask Process Correction (Rule-MPC) by rule-based biasing
    • Model Mask Process Correction (Model-MPC) for laser and e-beam mask processes
    • Verification, DRC and simulation features

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